PCS & grid

Transformer vector group

A transformer vector group is the letter-and-clock code on the nameplate — Dyn11, YNd11, YNyn0 — that says how each winding is connected and how far apart in phase the windings sit. IEC 60076-1:2011 calls it the connection symbol: a conventional notation for the connections of the high-voltage, intermediate-voltage and low-voltage windings and their relative phase displacements, expressed as letters plus clock-hour figures.

"Vector group" is the colloquial name, though the standard itself uses the phrase informally and undefined in the reconnectable-winding clauses, 7.1.4 and 7.2.4. The letters carry the winding connection and the neutral treatment; the digits carry the phase displacement in 30-degree steps read off a clock face.

On a storage project that one short string decides whether the collection system has an earth reference, how the transformer differential relay must be compensated, and whether two step-up units can be paralleled at all.

Reviewed August 2026 by Sergey Syrvachev

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What it is (precise)

Read the string left to right, highest rated voltage first. IEC 60076-1:2011 Clause 7.1.1 fixes the case convention: capital Y, D or Z for the high-voltage winding, lowercase y, d or z for the intermediate and low-voltage windings — Y/y star (wye), D/d delta, Z/z zigzag.

An N or n is appended only when that winding's star or zigzag neutral point is actually brought out, so Dyn11 has an accessible LV star neutral and Dy11 does not. The letters run in descending order of rated voltage independently of the intended power flow, which is why a step-up generator or inverter transformer is still written HV-first, and each intermediate and low-voltage letter is immediately followed by its own clock number.

The clock number comes from a drawing convention rather than a formula. Clause 7.1.2 orients the high-voltage phasor diagram with phase I pointing at 12 o'clock, places the LV phase I phasor according to the induced-voltage relation the connection produces, and reads the clock number as the hour on which the low voltage points, the phasors rotating counter-clockwise in the sequence I–II–III.

The formal quantity behind it is the angular difference between the phasors representing the neutral-to-terminal voltages of two windings, with a positive-sequence voltage system applied to the HV terminals. Twelve hours cover 360 degrees, so each hour is 30 degrees — though IEC states displacement in its worked examples as explicit degrees, and the "n × 30-degree increments" phrasing comes from the protection literature rather than from IEC text.

Two notations sit outside that pattern, and one common assumption needs bounding. A supplementary delta not brought out to three line terminals — IEC's stabilizing winding, defined as a delta added to a star-star or star-zigzag transformer to decrease its zero-sequence impedance and not intended for three-phase connection to an external circuit — is written with a plus sign and carries no phase displacement at all; the worked symbol is YNa0+d, 400/130/22 kV.

Open windings of series and phase-shifting transformers likewise get no clock number. And while any multiple of 30 degrees from 0 to 360 can be built from delta, wye and zigzag windings — which is what makes a 12-hour clock the natural notation — that is no limit on transformers generally: phase-shifting and multi-pulse rectifier transformers deliberately produce non-30-degree angles and fall outside clock notation.

The letters also change the arithmetic inside the tank, which catches people out. The quotient on the nameplate — 34.5 kV / 690 V, a factor of 50 — is a ratio of rated line voltages, and it equals the winding turns ratio only when both windings carry the same connection.

Put the delta on the HV side and a star on the LV side and each HV winding stands at the full 34.5 kV while each LV winding sees 690/√3 V, so the per-winding turns ratio is 50 × √3 ≈ 86.6; reverse the arrangement to YNd and the identical nameplate implies 50/√3 ≈ 28.9. The vector group is therefore an input to the winding design itself, not a label applied afterwards — the transformer-turns-ratio entry carries the tap arithmetic that sits on top of it.

Why it matters in a real grid-scale project

Protection engineers care about the clock number because it is a real angle in the current phasors, and a differential relay that does not compensate for it will misoperate on through-current. The sequence arithmetic is compact: a transformer that shifts the positive sequence by n × 30 degrees for vector group n shifts the negative sequence by exactly −n × 30 degrees.

Zero sequence behaves differently again — the transformer is an open circuit in the zero-sequence network at a delta winding or an ungrounded-wye winding, and a sink at a grounded-wye winding, assuming the zero-sequence flux closes through a four-leg core or a delta. That open circuit is the delta zero-sequence trap: for an external ground fault on the wye side, no zero-sequence current reaches the CTs on the delta side.

A star-star transformer with no delta anywhere is the connection to watch. The US Bureau of Reclamation states that wye-wye transformers are seldom, if ever, used to supply plant loads or as GSU units because of the inherent third-harmonic problems with the connection, and that delta-delta, delta-wye and wye-delta are used extensively instead; it lists neutral-bonding remedies but concludes it is easier just to use a connection scheme containing a delta and avoid the problem altogether.

IEC's structural answer is the stabilizing winding, a supplementary delta whose stated purpose is to decrease zero-sequence impedance. Note that the two framings are adjacent, not identical — USBR names a harmonic problem, IEC defines a zero-sequence remedy — and neither document spells out the textbook mechanism linking them.

Where the delta sits also decides where the system gets its earth reference, which on a storage plant is a grid-code question rather than a preference. EPRI treats zero-sequence blocking by a delta or ungrounded-wye winding as the exception to a transformer otherwise passing sequence currents, and names grounded wye on the utility primary feeder side with delta on the DER side as the configuration providing a small zero-sequence shunt impedance — a ground source seen from the grid.

It also notes the decoupling: with a delta or ungrounded wye on either side, generator-side neutral grounding does not affect primary-side grounding conditions.

Put the delta on the collector side instead and that bus loses its reference, so a bus-connected grounding transformer must be added — and "effectively grounded" is a measured claim, not an adjective. The classical IEEE C62.92-family criterion is X0/X1 at or below 3 with R0/X1 at or below 1, both positive, evaluated at the bus in question, and that inequality is what sizes the grounding transformer. It is also why the vector group and the collection-system earthing design have to be settled in one conversation rather than two.

Dyn11 read letter by letter, with the clock face showing the 30° displacement between the HV and LV phasors.
Reading a vector group: Dyn11Dyn11DHV winding: deltayLV winding: star (wye)nLV neutral brought out11clock number: 11 × 30°Capitals are the HV winding, lowercase the LV — and the letters arewritten in descending order of voltage, whichever way power flows.Yy with no delta anywhere is the one to question: USBR callsit seldom used for plant loads or GSUs. Different population in DER,where Yg:Yg leads at 49% (EPRI) — passes zero sequence, no MV ground source.121136930°HV phasorLV phasorIEC calls this a 330° lag. Practitioners saythe LV leads by 30°. Same angle, same clock.US practice (USBR) defaults the other way — clock 1.Direction assumes ABC phase sequence —on ACB it reverses.
Key facts
Letters and case
Capital Y/D/Z = HV winding, lowercase y/d/z = intermediate and LV; N or n added only when that neutral is brought out (Dyn11 has an LV neutral, Dy11 does not)
Letter order
Descending order of rated voltage, independent of intended power flow — a step-up GSU is still written HV-first
Clock number
The hour the LV phasor points to with the HV phasor at 12 o'clock, rotation counter-clockwise I–II–III; one hour = 30 degrees
Dyn11 (IEC worked example)
20 000/400 V: HV delta, LV star with neutral brought out, LV lagging the HV by 330 degrees
YNd11 (IEC worked example)
20/8,4 kV GSU: network-side star with neutral brought out, generator-side delta lagging by 330 degrees
Clock 0
YNyn0d5 at 123/36/7,2 kV — the 36 kV star winding is "in phase with the high-voltage winding"; the 7,2 kV delta lags 150 degrees
Stabilizing delta
Buried delta written with a plus sign and no clock number (YNa0+d, 400/130/22 kV); added to star-star to decrease zero-sequence impedance
Per-winding turns ratio
The nameplate quotient is the rated-voltage ratio (50 for 34.5 kV/690 V) and equals the winding turns ratio only when both windings share a connection — Dyn per-winding 50 × √3 ≈ 86.6, YNd 50 / √3 ≈ 28.9
Paralleling
Identical angular displacement mandatory — 0-degree with 30-degree gives a dangerous short circuit (USBR); matching impedance is a separate requirement
Cost of a clock mismatch
Two matched units one hour apart: driving voltage 2·sin 15° ≈ 0.52 pu across ~0.12 pu of series impedance (5.5–8% each) ≈ 4.3 × rated circulating current at no load
Sharing when matched
Group and ratio matched, load divides inversely with per-unit impedance — a 6% unit beside an equally rated 8% unit takes ~57% and hits its limit first
What utilities actually use
EPRI poll (Feb 2021): Yg:Yg most common DER interconnection transformer at 49%; about one-fifth of utilities require Yg:Δ

Typical values and standards

IEC 60076-1 Clause 7.1.5 works the common groups explicitly, which is the fastest way to make the notation concrete. Dyn11: a 20 kV delta-connected high-voltage winding and a 400 V star-connected low-voltage winding with the neutral brought out, the LV lagging the HV by 330 degrees, written "Dyn11 20 000/400 V".

YNd11: a generator step-up transformer for a 20 kV network and an 8,4 kV generator side, network windings in star with the neutral brought out, generator windings in delta, the delta lagging the high-voltage winding by 330 degrees, written "YNd11 20/8,4 kV". Note where the delta sits in that second example — it is the low-voltage, machine-side winding, exactly the position an inverter-side delta occupies.

Clock 0 is best learned from IEC's three-winding example, YNyn0d5 at 123/36/7,2 kV: a 123 kV star winding with neutral brought out, a 36 kV star winding with neutral brought out that is "in phase with the high-voltage winding" and not auto-connected, and a 7,2 kV delta third winding lagging by 150 degrees.

One symbol, two lessons — a clock number of 0 means no displacement at all, and a star-star machine very often carries a delta somewhere. IEC's reconnectable-winding example documents a form that turns up in tenders: "YNy0 (d11) 110/11 (6,35) kV", where the LV is delivered as 11 kV star but can be reconfigured as 6,35 kV delta, the alternative shown in brackets.

Direction is where the notation bites, and the honest answer is that two conventions coexist. IEC's note on phase displacement makes the HV phasor the reference at 12 o'clock and says rising clock numbers indicate increasing phase lag — a statement about the notation, not a claim that the LV always lags.

Clock 0 is in phase, and a clock-11 lag of 330 degrees is the same phasor as a 30-degree lead, which is how practitioners describe Dyn11. US practice defaults the other way: the USBR guide, following ANSI/IEEE convention, states that in delta-wye and wye-delta connections each low-voltage phase lags its high-voltage phase by 30 degrees, which is clock 1. Both are 30 degrees of displacement, in opposite senses.

How it shows up in specs, studies and contracts

On an MV power-block datasheet the vector group sits alongside MVA, impedance, tap range and BIL, and it is not a field to leave at the supplier's default. Vendors state the reading rule for you: SMA's inverter-transformer guidance says the second part of the notation gives the inverter-side winding, so YNd is wye-grounded on the grid connection side and delta on the inverter connection side.

Which arrangement you may use is often set by the inverter rather than by grid preference — SMA's Sunny Tripower document requires a neutral conductor between inverter and transformer for the grounded-wye models it lists — optional on the Sunny Tripower CORE1, which ships with a factory-installed neutral-to-ground jumper — and states that phase displacement does not affect those inverters' operation, so compatible winding configurations can carry any available clock number.

Tie the specified group to the medium-voltage neutral treatment rather than copying the last project. SMA's Sunny Central and Sunny Central Storage transformer document recommends Dy11, Dy5, Dy1, Dd0 and Dd6 plus Yd11, Yd5 and Yd1 for an insulated MV neutral, YNd11, YNd5 or YNd1 for a resonant-grounded MV neutral, and YNy0 for a low-resistance grounded neutral — note that both delta-on-inverter-side and wye-on-inverter-side appear in the same table.

The same document requires that where a low-voltage neutral-point terminal exists, it must not be grounded or connected. SMA gives no reason for that rule; the practical effect is an inverter-side system left with no zero-sequence path.

Field data should temper any assumption about what is normal. EPRI's February 2021 utility poll found Yg:Yg the most common DER interconnection transformer at 49% — a connection that passes zero sequence but does not act as an MV ground source — with about one-fifth of polled utilities requiring Yg:Δ for many DER applications and specifying a neutral-to-ground impedance where they do.

Renewables practice points differently again: IEEE PES reports that wind generator step-up transformers most often carry the delta on the collector-system side, and PSRC C25 reports the wye is very commonly on the low-voltage side because the turbine converter is wye but ungrounded. One BESS MV power station datasheet, Ingeteam's INGECON SUN STORAGE FSK M series, specifies Dy11 outright — delta on MV, wye on the inverter LV side.

Paralleling and circulating current

Matching angular displacement is mandatory for paralleling — USBR puts it bluntly, that a zero-displacement bank cannot be paralleled with a 30-degree one without a dangerous short circuit — and the mechanism is a phasor subtraction rather than a rule of thumb. Two transformers tied to a common MV bus present two secondary voltage phasors to the same terminals.

Let the clock numbers differ by one hour and those phasors sit 30 degrees apart, so the voltage driving current round the loop is |V1 − V2| = 2·sin 15°, about 0.52 per unit. Essentially nothing opposes it but the two transformers in series: at the 5.5 to 8 percent short-circuit impedance a BESS unit transformer normally carries, that is roughly 0.12 pu, and the circulating current lands near four and a third times rated — with no load connected and no fault anywhere on the system.

Equal clock numbers only zero the angle term. Magnitude has to agree as well: one 2.5 percent tap step of difference across that same 0.12 pu drives about 0.21 pu of circulating current, a fifth of rating flowing continuously between two healthy transformers, heating both and occupying apparent power that never reaches the point of interconnection.

And once group and ratio both match, load divides inversely with per-unit impedance on a common base — a 6 percent unit beside an equally rated 8 percent unit takes about 57 percent of the total and reaches its own limit first, so the bank derates to the weaker sharing rather than the sum of the nameplates. This is why the connection symbol alone is not sufficient: matching impedance is a separate requirement, and an intention to parallel with existing units belongs in the enquiry, together with those units' connection diagram and connection symbol.

On a storage plant the exposure is concentrated rather than everywhere. Each PCS block normally has its own unit transformer, so blocks do not parallel through their transformers; the questions land instead on the main step-up bank tied against an existing utility unit, on station-service transformers sharing an auxiliary bus, and — the case most often missed — on a replacement or augmentation transformer bought years later from a different supplier against a photocopy of the original nameplate.

Put the full symbol with its clock number into that purchase order, ask for impedance with its tolerance, and confirm the as-built bushing landings and site phase sequence before closing the tie, because the nameplate assumptions unpacked below govern a paralleling check exactly as they govern a relay setting.

Common pitfalls

The expensive mistake is arguing about direction from memory. "Dyn11 shifts 30 degrees" is not something anyone can act on until you say which winding moves which way and under which convention. IEC's own examples call Dyn11 and YNd11 a 330-degree lag of the low-voltage winding behind the high; practitioners call that identical phasor a 30-degree LV lead; USBR, writing US practice, describes delta-wye and wye-delta as the LV lagging by 30 degrees, which is clock 1.

All three describe real transformers. Put the clock number in the specification and in the relay settings, never the adjective — and remember that clock 0 means no displacement at all, so "the LV lags" is not a universal reading of the notation.

The nameplate is not an unconditional promise either. SEL's protection paper is explicit that the phase shift given on the nameplate assumes two things — an ABC system phase sequence and standard phase-to-bushing connections — and shows a case where non-standard phase-to-bushing connections make the actual shift differ from the nameplate.

The same paper puts the sequence dependence plainly: the trailing digit counts the 30-degree increments by which low-side currents lag the high-side for ABC phase sequence, and lead for ACB. So before setting differential compensation, verify the as-built bushing landings and the site phase sequence rather than transcribing the nameplate into the relay.

Two smaller traps close the list. Treat a delta on the inverter side as one defensible option rather than the default; the field evidence above points both ways, and the MV neutral treatment decides it. And "the delta blocks inverter DC injection" circulates widely, but as of mid-2026 none of the sources cited here attribute DC blocking to the delta rather than to the transformer's galvanic isolation — treat it as unverified until a vendor or standard puts it in writing.

Common misconception

The clock number tells you how far the LV lags the HV — so a delta-wye transformer always puts the low side 30 degrees behind the high side.

In reality: IEC 60076-1's note does say that, with the HV phasor at 12 o'clock, rising clock numbers indicate increasing phase lag — but that describes the notation, not a universal LV lag. Clock 0 is in phase: IEC's own YNyn0d5 example has the 36 kV winding "in phase with the high-voltage winding". And IEC's Dyn11 and YNd11 examples are a 330-degree lag, which is the same phasor every practitioner calls a 30-degree LV lead, while US practice per USBR defaults to clock 1, the LV lagging by 30 degrees. On top of that, the nameplate assumes ABC phase sequence — on ACB the low side leads instead — and standard phase-to-bushing connections. Quote the clock number, the sequence and the convention, never the adjective alone.

Visuals & further reading
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Transformer vector group, in context.

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