Transformer paralleling

The compatibility checklist

The conditions divide by how they fail. Ratio and tap should agree to about ±0.5% of no-load secondary voltage, and per-unit impedance — quoted on each unit's own rating base — within roughly 7.5-10%; miss either and the pair still works, at the cost of circulating current or a capacity derate that grows with the gap.

Vector group, polarity and phase sequence allow no tolerance at all, and there is no such thing as a small clock error: the minimum nonzero mismatch between clock groups is a full 30°, which puts about half of rated voltage across the loop before any load is connected. Similar X/R rounds out the list as a second-order refinement.

A guideline rides on top of the five: keep the rating ratio of paralleled units within about 3:1, because impedance and X/R vary systematically with transformer size, and holding conditions four and five across a 4:1 or 5:1 gap gets hard. The vector-group entry owns the clock notation, the IEC convention and the nameplate caveats; the transformer-turns-ratio entry owns the tap arithmetic. This page is about what happens when two tanks disagree on any of it while sharing a pair of buses.

Circulating current: the price of a ratio or tap mismatch

The mismatch arithmetic starts before any load is connected. Give two paralleled transformers slightly different no-load secondary voltages — a ratio difference, or one tap step of stagger — and that difference ΔE drives a current around the closed secondary loop limited only by the two leakage impedances in series: I_circ = ΔE/(Z_A + Z_B), or in per-unit on a common base, ΔE(pu)/(z_A + z_B).

The load is absent from that equation, so the current flows at no load and at every load. Both impedances are predominantly reactive, so the circulating current lags the driving voltage by roughly 90° — an exchange of reactive power between two healthy tanks that consumes copper loss and thermal capacity in both while delivering nothing, and real-power metering gives no sign of it.

The magnitudes are what make ratio matching a first-order thermal requirement. A 1% voltage difference between two 6%-impedance units circulates 0.01/0.12 = 8.3% of rated current — roughly 241 A on the 690 V winding of a 3.45 MVA skid-class unit — and a single 2.5% tap step of stagger across the same pair circulates about 21% of rating continuously, the ~0.21 pu figure the transformer-vector-group entry quotes, worth around 4% of rated-current copper loss in each tank.

The gain from voltage error to current is roughly six to eight times, because the denominator is only about 0.12-0.16 pu for typical units, and the current grows linearly with every further tap step of stagger.

Direction matters, because one tank pays first. The unit with the higher no-load secondary EMF sources the circulating current and exports the circulating vars to its lower-EMF partner; under a lagging load the circulating component adds to the high-EMF unit's load current and subtracts from the other's, so the high-EMF unit reaches its thermal limit first.

A naming trap hides inside that rule: on a high-voltage tap of a step-down transformer, the tap position with fewer HV turns produces the higher secondary EMF — so "the unit on the higher tap" has to be checked against turns before deciding which tank is loading up.

Load division when impedances differ

With ratio and group matched, the pair spans the same two buses and shares one internal voltage drop, so current divides in inverse proportion to ohmic impedance — equivalently, kVA divides inversely with per-unit impedance on a common base, the form the transformer-vector-group entry uses for its equally rated example.

Convert to each unit's loading as a fraction of its own rating and the criterion shifts: loading fractions follow per-unit impedance on each unit's own rating base, so the unit with the lower own-base impedance runs the higher fraction of its nameplate and reaches full load first, whatever its physical size.

For equally rated units the two comparisons coincide; for unequal ratings only the own-base test predicts sharing. A 40 MVA unit at 12% paralleled with a 30 MVA unit at 9% has equal common-base impedances and therefore equal currents — which loads the 30 MVA unit a third harder than its partner and caps the pair at 60 of its 70 MVA nameplate sum. Equal own-base per-unit impedance gives pro-rata sharing across any ratings mix, and that is the design target.

The derate follows directly. Because the low-impedance unit saturates its rating first, usable capacity is S_lowz + S_other × (z_low/z_high), below the nameplate sum whenever own-base impedances differ.

Equally rated units at 6% and 8% deliver about 1.75 rather than 2.0 per unit — loading them to the sum would put the 6% unit at 114% while the 8% unit idles at 86% — and the headroom stranded in the high-impedance tank stays stranded, because the division is fixed by the impedance ratio rather than by anything an operator can dispatch. The pair therefore runs to a derated combined limit, enforced in the EMS if the transformers cannot be changed. The usual ≈10% matching rule keeps the derate under about 5%.

Vector-group mismatch, and the X/R footnote

A vector-group error is a different kind of failure. Two equal secondary voltage sets displaced by δ present a loop driving voltage of 2·sin(δ/2) per unit — the chord between two unit phasors — and the smallest nonzero clock error is 30°, worth about 0.52 pu. Across two 6% units in series that drives about 4.3 times rated current, the figure the transformer-vector-group entry derives for a one-hour mismatch.

A 60° error — Dyn11 closed against Dyn1 — applies full rated voltage around the loop and drives about 8.3 pu; a phase-rotation error roughly 14.4 pu; reversed polarity roughly 16.7 pu. For calibration, a bolted through-fault via one 6% transformer is also about 16.7 pu, so the 60° case is half a bus fault flowing continuously from the moment the tie closes, with no fault anywhere on the system, and the driving voltages involved sit 52-200 times above a 1% tap error's. Clock groups therefore match exactly, or the transformers stay on separate buses.

X/R mismatch sits at the opposite end of the severity scale. With impedance magnitudes equal but impedance angles φ apart, the two currents come out equal in magnitude and φ apart in phase, so each unit carries 1/cos(φ/2) of its ideal half-share and the pair's usable capacity falls by the factor cos(φ/2). The numbers are small: X/R of 10 against 3 — a 12.7° angle gap — costs about 0.6%, and 10 against 5 about 0.12%.

The units also settle at slightly different power factors, one supplying more of the reactive load and the other more of the real. On its own the effect almost never governs; it matters stacked on a magnitude mismatch or in allocating losses and heating, which is why the practice guidance says "similar X/R" and leaves it qualitative.

Where a BESS project actually meets it

The instinct on a storage one-line is to treat every skid transformer on the MV collection bus as paralleled, and the instinct is wrong in a useful way. Circulating current needs a closed loop through both sides — MV bus, transformer A, LV bus A, a tie, LV bus B, transformer B, back to the MV bus — and on a standard plant that loop never exists: each skid transformer's LV winding lands on its own converter, with no galvanic tie between skid LV buses.

A ratio spread between skids just shifts each unit's LV operating voltage, and even a clock difference — an augmentation skid delivered Dyn1 among Dyn11 units — is absorbed by each PCS's phase-locked loop synchronising to its own shifted LV voltage.

What a group mismatch does cost is optionality and coherence: it forbids tying those LV buses together as wired — crossties, a shared spare transformer and maintenance back-feeds all become the 60° catastrophe until the odd-clock unit is re-terminated, swapping the same phase pair on both sides to map clock n to 12 − n, so a delivered Dyn1 can present externally as Dyn11 — and it breaks phasor-consistent protection settings and phasing checks across the fleet.

Hence the specification rule: no loop means no circulating current, and uniform vector groups and phase sequence get specified anyway, as if the loop will someday be closed.

Genuine paralleling concentrates in the plant's upper layers. Two or more main power transformers between the collection bus and the grid — or MV buses run with a closed bus tie — carry the full checklist, including tap coordination: paralleled units belong on identical tap positions, since each step of stagger circulates roughly 8-21% of rated current for typical impedances.

On-load tap changers get master-follower control with the taps locked in step, or the circulating-current-minimisation method, where each AVR measures the reactive component of the inter-unit exchange and steps the high-EMF unit's tap down to null it.

Independent AVR control on each unit is the known failure mode: measurement differences send the two tap changers in opposite directions, the stiff network holds the bus voltage so neither controller ever sees its error corrected, and each further step raises ΔE — positive feedback that walks the pair to opposite mechanical end-stops at maximal circulating current.

Augmentation and the auxiliary system supply the other two exposures. An augmentation main transformer added in parallel with a legacy unit needs its own-base per-unit impedance within about 10% of the incumbent's and its vector group matched exactly — otherwise the tie operates open and the plant runs as two radial halves.

Auxiliary transformers on a main-tie-main LV board parallel genuinely for a few seconds during closed-transition transfer, long enough for a ratio, tap or group error to drive its full circulating current, so aux transformers are specified as a matched paralleling pair even when normally run split, with the upstream sources in phase during the transition.

De-energised taps on pad-mounted units follow the same logic at commissioning cadence: set identical positions, record them, re-verify at every augmentation. And even where no loop exists, each new unit's impedance feeds the MV short-circuit study — a transformer's bus-fault contribution scales inversely with its impedance — shifting relay reach and grading margins that were set for the original homogeneous fleet.