Voltage drop

What it is (precise)

On a DC run the drop is ΔV = I × R, with R the resistance of the whole current loop — out on one conductor and back on the other, so a 50 m run is 100 m of conductor — set by resistivity, length and cross-section. On an AC feeder the conductor's reactance joins in: the per-phase drop is approximately I × (R cos φ + X sin φ), which is why an AC drop calculation needs the power factor and why a heavily reactive dispatch drops more voltage through the same cable than a unity-power-factor one.

The law itself has its own entry under Ohm's law; this page is where the law meets the plant's conductor schedule, because every run on the single-line diagram — busbar, DC cable, LV bus, MV feeder, transformer winding — is a resistance or impedance in series with the power flow, and each one takes its volts in proportion to the current of the moment.

The same ampere costs the same volts wherever it flows, but the volts matter differently by level, which is why drop is judged as a percentage of the local bus. At fixed power, current scales as 1/V, so the absolute drop through a given conductor scales as 1/V and the percent drop as 1/V² — the arithmetic behind every step-up decision the plant makes, and behind the DC bus's own climb from 1000 to 1500 V, where the 1500 VDC entry works the numbers: two-thirds the current, and a percent drop that lands at 4/9 through the same copper.

The other discipline is the reference point. A voltage specification is meaningless without a location attached: the PCS voltage window is defined at the PCS DC terminals, contract performance is measured at the POI, and the battery vendor's voltage tables describe the rack terminals. Voltage drop is precisely the difference between those locations, so any check that compares numbers from two of them without the conductor run in between has assumed the drop is zero.

The DC run: battery terminals to PCS

Both bounds of the PCS voltage window are defined at the PCS DC terminals, so the cable between container and PCS narrows the usable window from both ends. Discharging, current flows from battery to PCS and the PCS sees the string voltage minus the cable drop — pressure on the floor.

Charging, the PCS must hold its terminals above the string by the same drop to push current in — pressure on the ceiling. The compression is proportional to current, so it is largest at exactly rated power, and it vanishes at rest — which is why a commissioning voltage check at low current proves nothing about the corners.

The currents are large enough for single volts per milliohm. A 314 Ah string at 0.5C carries about 157 A, and the paralleled bus of a 5 MWh-class container — on the order of a dozen strings — runs near 1,900 A at the same rate, so every milliohm of loop resistance between battery and PCS costs roughly 1.9 V at rated current.

Through the half-milliohm DC path in the 1500 VDC entry's worked example, 2,000 A leaves 1.0 V behind — about 0.07% of the bus. Small percentages, but they subtract from a window margin that is itself measured in tens of volts at the corners, and they recur at both ends of every cycle.

Where the DC drop actually binds is the cold, low-state-of-charge, high-current discharge — the corner the VDC window entry maps, where cold loaded sag sets the floor. Most of that sag comes from inside the cells: internal resistance drops roughly 40 mV per cell at 0.5C in the internal-resistance entry's worked example, and 0.1 V per cell is about 42 V at the terminals of a 416S string, growing as cold cuts electrolyte conductivity by roughly an order of magnitude between +25 C and -20 C.

The cable is the one term in that stack the designer fully controls — copper resistance actually falls slightly in the cold, around 0.4% per degree C, while the cells' resistance climbs — so conductor sizing cannot rescue a cold string, but an undersized run stacks avoidable volts onto the plant's worst corner at the exact hour the dispatch needs the floor to hold.

The AC side: PCS to POI

The AC story is dominated by one step change in current. A PCS block quoted at 3,600 kVA moves roughly 3,000 A of line current at its 690 V terminals — which is why the low-voltage bus is metres long and the step-up transformer sits on the same skid or pad as the inverter.

After step-up to a 34.5 kV collection level the same power is about 60 A, and feeders can cross hundreds of metres of site for a drop that would be intolerable at LV. That is the transmission-voltage argument scaled down to inside the fence: current falls as 1/V, load loss as 1/V², and the layout of a BESS site — short LV jumps, MV for every real distance — is that arithmetic drawn as a plan view.

The transformer itself is the largest single impedance in the chain. Its nameplate percent-impedance figure is a series impedance like any conductor's, and under load it drops voltage through the same I × (R cos φ + X sin φ) mechanism — the transformer-regulation face of voltage drop — so the MV-side voltage moves with both the magnitude and the direction of the plant's real and reactive dispatch.

That is why the load-flow study models the full chain, PCS terminals through transformer and collection feeders to the POI, at the corners of the P-Q envelope: reactive export raises the local LV voltage against a fixed grid, absorption lowers it, and the plant must still meet its voltage and reactive obligations at the POI, where performance is measured — not at the inverter.

On a multi-skid site the drop also differs by position along a feeder, so PCS units at the far end operate at a measurably different terminal voltage than those near the substation, which matters when every unit is asked for the same reactive contribution.

How it shows up in specs, studies and contracts

On the DC side the drop hides inside the battery-PCS pairing check: the worst-case loaded string minimum must clear Vdc_min plus the cable drop at maximum discharge current, and the charge peak must clear Vdc_max minus the same allowance. That calculation is only as good as its inputs, so the one-line diagram and DC cable schedule must carry the real conductor lengths and cross-sections behind it — a drop computed from a layout sketch that the civil design later stretched is a window margin that no longer exists.

The cable-sizing calculation runs at rated current with temperature-corrected conductor resistance, and commissioning can verify it directly: measure the voltage at both ends of a run at a known current and the difference is the as-built resistance, joints included — the same joints whose heating belongs to the I²R losses entry.

In studies and contracts the two sides separate. The DC drop feeds the battery-PCS envelope check and, through it, the capacity test: the witnessed test runs to a defined end-of-discharge, and if the PCS reaches its floor early because the cable drop was underestimated, the plant fails a test the cells could have passed.

The AC drop feeds the load-flow and reactive-capability studies at the POI, where the interconnection agreement holds the plant to voltage and power-factor obligations. Efficiency guarantees count the energy half of the same current — the I²R heat — but the voltage half is what decides whether rated power is deliverable at all at the corners, and the two halves are settled in different documents against different penalties.

Common pitfalls

The first trap is filing voltage drop under efficiency and moving on. The energy cost is the I²R half and it is genuinely small — fractions of a percent on a well-sized run. The expensive half is positional: the same few volts, subtracted at the PCS terminals at maximum current, compress the operating window at the corner where the capacity test ends and the winter dispatch strains, and no efficiency line item captures that.

The related error is computing the drop at an average or nominal current: drop scales linearly with current, so a figure quoted at typical dispatch understates the corner by the full ratio of peak to average — and the corner is also where the string is coldest and lowest, with the least margin to give.

The remaining traps are reference-point mixups. Comparing battery terminal voltage directly against a PCS window defined at the PCS DC terminals flatters the margin by exactly the cable drop, in both directions — the check must be run for the charge ceiling as well as the discharge floor, because the drop presses on both.

Quoting a drop in volts without naming the bus invites the wrong judgment: 1 V is noise at 34.5 kV and real margin at the DC floor. And on DC, forgetting that the loop is two conductors halves the computed resistance of every run. Each is an arithmetic slip; each survives every review that checks quantities but not locations.