Battery

Open-circuit voltage OCV

Open-circuit voltage is the voltage a cell or string settles to when no current flows — the equilibrium its electrode chemistry sets at each state of charge, and the only voltage that maps to SOC at all. A working plant almost never displays it: under load the terminals show OCV minus the I × R sag on discharge and OCV plus it on charge, so the number on the DC bus is an operating point, not a state readout.

The BMS still leans on OCV as its calibration reference for SOC estimation — awkwardly, on LFP, because the OCV curve is nearly flat at about 3.2-3.3 V across the mid-range, which is why coulomb counting carries the middle of the window and OCV corrections re-anchor the estimate at the steep ends.

And an OCV reading only counts after a genuine rest: the ohmic part of the offset vanishes the instant current stops, but the slow diffusion tail decays over minutes to hours, which is why rest periods are written into capacity-test protocols rather than left to judgment.

Reviewed August 2026 by Sergey Syrvachev

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What it is (precise)

Open-circuit voltage is the potential difference between a cell's terminals at zero current, once the internal chemistry has settled to equilibrium. It is a function of state of charge first and temperature second, and for a given chemistry it is published as the OCV-SOC curve — a property of the cell, not of the plant around it. For the LFP cells that dominate stationary storage, that curve lives inside the protected 2.5-3.65 V window around the 3.2 V nominal, and its shape is distinctive: steep at both ends, nearly flat across the middle.

The nominal figure is a label with its own entry; OCV is the physical quantity underneath the label, and unlike the label it moves — the equilibrium OCV traverses roughly half a volt per cell empty to full, less than the 1.15 V protected terminal window around it, with most of that travel packed into the last few percent at each end.

The moment current flows, the terminals stop showing OCV. Loaded terminal voltage is OCV minus I × R on discharge and OCV plus I × R on charge, where R is the cell's internal resistance — a surface over SOC, temperature and age that the internal-resistance entry maps in full.

The worked example there puts the sag at roughly 40 mV for a 314 Ah cell at 0.5C, and the direction of current decides which way the offset points: discharge presses the bus below the OCV baseline, charge lifts it above. This is the same one-line equation the VDC-window entry builds its corner analysis on — OCV set by SOC positions the baseline, and the resistive term swings the operating point around it, hardest when the container is cold.

Series stacking multiplies all of it. A 1500 VDC-class string of roughly 360-416 cells presents the sum of its per-cell terminal voltages: nominal around 1,150-1,330 V, a protected floor near 900-1,040 V that is a cold, loaded number rather than an OCV, and every per-cell offset arriving at the terminals times the series count — a 0.1 V per-cell effect is roughly 42 V on a 416S string.

One voltage in particular is a design number — and it is not an OCV: the maximum DC voltage the contactors, fuses, cabling and PCS input must be rated for is the held charge-limit terminal voltage, series count times the per-cell charge ceiling, reached while charge current still flows (the VDC-window entry's hot-vs-cold charge cases set it).

The rested full-charge OCV settles below that ceiling once current stops. The ceiling itself is held down for a separate reason: 416 cells at the datasheet 3.65 V maximum would stand near 1,518 V, over the 1500 V system rating, so deployed 416S platforms keep the operating charge ceiling below 3.65 V.

The SOC ruler with a flat middle

SOC cannot be measured directly, so the BMS estimates it — typically coulomb counting through a shunt or Hall sensor, corrected against OCV, increasingly with Kalman-type model observers on top. The OCV correction works by inverting the OCV-SOC curve: read a rested voltage, look up the state of charge it corresponds to.

That inversion is only as good as the local slope of the curve, and this is where LFP's flat plateau turns from a dispatch convenience into an estimation problem: across roughly 20-80% SOC the open-circuit voltage moves only tens of millivolts, while cell-voltage sensing is accurate to about ±2-5 mV — so a few millivolts of error, well within spec, maps to several percent of SOC. Mid-window, voltage is a weak ruler on LFP; NMC's steeper curve is far more forgiving of the same sensing.

The estimation architecture follows from that shape. Coulomb counting carries the burden across the plateau, holding roughly 2-5% accuracy between calibrations, and the OCV correction only helps at the steep ends of the curve — which is why the estimate must be periodically re-anchored via a full or near-full charge, where the curve finally gives voltage something to say.

The operational consequence is real: a regulation-heavy plant shallow-cycling around 50% SOC can run for weeks with no OCV anchor while the coulomb counter drifts a percent or more, and the fix — a scheduled full charge — itself costs calendar life and has to be planned, not assumed. The state-of-charge entry carries that trade in full; what belongs here is the cause: the ruler the correction reads from has no markings in the middle.

The plateau is why voltage is a weak SOC ruler in LFP — the curve is only steep at the two ends, and the cell lives in the flat middle.
2.43.8per-cell open-circuit voltage, LFP (V)basis: at zero current after full relaxation — an equilibrium, not anoperating pointsteepplateausteep20–80% SOC — tens of mV2.5 V floor3.65 V

Under load the terminal voltage is OCV minus I × R on discharge and plus it on charge — about 40 mV at 0.5C in the internal-resistance entry's worked arithmetic, which is the same order as the entire plateau's movement. Sensing is ±2–5 mV per cell against a millivolt-scale plateau slope, so a few millivolts of error maps to several per cent of SOC mid-window; coulomb counting carries the plateau at roughly 2–5% accuracy between calibrations, and a full or near-full charge re-anchors the estimate at the steep end. At string scale every per-cell offset multiplies by the series count — 0.1 V per cell is about 42 V at the terminals of a 416S string — and the rested full-charge OCV settles below the held charge ceiling the design sets as series count times per-cell charge-limit voltage. Relaxation is the procedural part: the I × R offset vanishes the moment current does, but the diffusion tail decays over minutes to hours, longer cold and after hard cycling, which is why capacity tests specify the rest as a contractual protocol item, balance is judged from rest voltages near the window ends, and strings are OCV-matched before paralleling.

Key facts
Definition
Terminal voltage at zero current after full relaxation — an equilibrium set by SOC (and weakly by temperature), not an operating point
Loaded relationship
Terminal voltage = OCV − I × R on discharge, OCV + I × R on charge — roughly 40 mV at 0.5C in the internal-resistance entry's worked example
LFP plateau
~3.2-3.3 V per cell across the mid-range; the OCV moves only tens of millivolts over roughly 20-80% SOC
Why voltage is a weak SOC ruler
±2-5 mV cell sensing against a millivolt-scale plateau slope — a few mV of error maps to several percent of SOC mid-window
Estimation split
Coulomb counting carries the plateau (~2-5% accuracy between calibrations); OCV re-anchors at the steep curve ends via a full or near-full charge
String scale
416 series positions multiply every per-cell offset — 0.1 V per cell is ~42 V at the terminals; the design's maximum DC voltage is the held charge ceiling (series count × per-cell charge-limit voltage), which the rested full-charge OCV settles below
Relaxation
The I × R offset vanishes at current-zero; the diffusion tail decays over minutes to hours — longer cold and after hard cycling
Where rest is procedural
Capacity tests run charge → rest → discharge with the rest a contractual protocol item; balance is judged from rest voltages near the window ends; strings are OCV-matched before paralleling

Rest and relaxation — when a reading counts

Cut the current and the offset from OCV collapses in two stages. The ohmic I × R term disappears the instant current stops — that part is just resistance. What remains is polarization: concentration gradients built up in the electrodes and electrolyte during the dispatch, which decay by diffusion as the cell relaxes toward equilibrium.

That tail is the slow part — minutes to hours rather than milliseconds, longer after hard or deep cycling and longer in the cold, where every transport process in the cell runs slower. A voltage sampled five minutes after a hard discharge is neither a loaded reading nor an OCV; it sits partway down the relaxation curve, and on a plateau where millivolts are percent of SOC, partway is not close enough.

The plant's procedures encode this physics wherever a voltage is asked to mean something. The commissioning capacity test runs full charge, then a rest period, then the witnessed discharge — and the rest is a contractual protocol item alongside temperature and rate, because two parties running different rest periods on the same plant will produce different, equally defensible numbers.

Balance is judged from rest voltages taken near the ends of the SOC window, where the curve steepens enough to show the spread — the cell-imbalance entry owns why the plateau hides it everywhere else. And before strings are paralleled onto a shared DC bus, their rested voltages are matched: two strings whose OCVs differ will drive a circulating current through busbars deliberately sized for low resistance, with no load connected at all — the parallel-connection entry carries the arithmetic.

How it shows up in specs, studies and contracts

On a cell datasheet the OCV appears as a curve or a table of voltage against SOC, quoted at a reference temperature and after a stated rest — conditions worth reading, because a curve logged after a different rest at a different temperature is a slightly different curve.

The design arithmetic built on it runs at the corners: series count times the per-cell charge-limit voltage against the 1500 V system rating at the top, and series count times the low-SOC OCV minus the cold loaded sag against the PCS window floor at the bottom. OCV positions the baseline at the bottom, but neither corner binds at rest — which is why sizing a string from OCV alone flatters both ends.

In execution the OCV works backward as a diagnostic. At commissioning, a string voltage that does not equal the series count times a plausible per-cell rest voltage points at a miswired or dead element before any capacity test runs. Through operations, per-cell rest voltages near the window ends are the honest telemetry for balance and drift, and the BMS's own OCV anchoring events are worth logging — a fleet that never visits the steep ends is a fleet whose displayed SOC is slowly detaching from reality.

In augmentation planning the OCV mismatch is the physical reason fresh strings land on a separate bus or PCS input: years into the project a new rack is high-voltage-for-its-SOC relative to its aged neighbours, and paralleling the two forces the circulating-current problem above at rack scale.

Common pitfalls

The classic error is reading SOC off a loaded voltage. On LFP the numbers make it hopeless: the sag at 0.5C is the same order as the entire 20-80% open-circuit plateau, so the resistive offset alone can swallow the whole signal — the bus voltage during a dispatch says more about current and temperature than about state of charge.

The resting version of the same trap is subtler: a rack sitting anywhere on the plateau reads about 3.2-3.3 V per cell whether it is at 25% or 75% SOC, so a rested mid-band voltage confirms only that the string is somewhere in the middle. Nominal voltage compounds the confusion — a string reading its nameplate voltage is not thereby at 50% SOC; the label and the curve are different objects.

The second family of errors is treating any pause as a rest. A reading taken minutes after hard cycling lands partway down the relaxation tail and maps to a wrong SOC with false confidence; readings taken after different rest durations, or at different temperatures, are not comparable points on one curve.

The discipline that survives contact with a warranty dispute is to treat OCV as a defined measurement — stated rest, stated temperature, stated SOC — exactly as the contract's test protocol does, and to treat everything else on the voltmeter as an operating point that needs the I × R term and the state-of-charge entry's estimation machinery to interpret.

Common misconception

Terminal voltage is the fuel gauge — read the DC bus and you know the state of charge.

In reality: Two separate distortions sit between the bus voltage and SOC. Under load the reading is offset by I × R — on LFP the sag at 0.5C is the same order as the entire 20-80% open-circuit plateau, so the resistive term can swallow the whole signal. And even a genuine rested OCV is only invertible where the curve has slope: mid-window, millivolts of sensing error map to whole percent of SOC, so a rested mid-band voltage proves only that the string is somewhere in the middle. That is why the BMS runs coulomb counting across the plateau and uses OCV as a calibration anchor at the steep ends — not as a lookup — and why every voltage a contract relies on comes with a stated rest, temperature and SOC behind it.

Visuals & further reading
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Open-circuit voltage, in context.

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